Senior IP Validation Engineer at Latticesemiconductor Malaysia Sdn ...



-Hands-on experience in FPGA IP validation with protocol validation equipment is required

-Experience with detailed IP validation plan creation and execution for IP and Subsystem design validation activities

-FPGA-based RTL design flows , which include FPGA design entry with Verilog, Timing Closure, Board Bring-up and Debug with analyzers/scopes

-Programming skills (e.g.: C/C++, Perl, TCL or Python) for Automated system level validation

-Strong background and Experience in eit...

Senior IP Validation Engineer

✍️ Job Description